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rev.1.0, sep.23.2003, page 1 of 53 m61280m8-xxxfp ntsc tv signal processor with mcu rej03f0053-0100z rev.1.0 sep.23.2003 features ? 3 line composite video signal inputs and 1 line s video signal input are available ? built-in 3 input audio switch with att output ? correspond to digital osd ? h output of emitter follower type (l at stopping, same as m61250bfp) ? selectable of acl/abcl ? built-in h osc resonator ? built-in vertical saw tooth generator ? correspond to fsc clock output ? built-in 5v & 8v regulator ? built-in mcu reset circuit ? built-in 8bit mcu ? rom: 32kbyte, ram: 1152byte applications ? ntsc color television receivers pin configuration package: 80p6u
m61280m8-xxxfp rev.1.0, sep.23.2003, page 2 of 53 block diagram
m61280m8-xxxfp rev.1.0, sep.23.2003, page 3 of 53 absolute maximum ratings item symbol condition ratings unit power supply voltage (asic) vcc (asic) 6.0, 10.0 v power supply voltage (mcu) vcc (mcu) ?0.3 to 6 v input voltage (mcu: cnvss) vi (mcu) ?0.3 to vcc+0.3 v input voltage (mcu: p00 to p07, p11 to p14, p20 to 27, p40 to p45, reset , cvin) v i (mcu) ?0.3 to vcc+0.3 v output voltage (mcu: p00 to p07, p11 to p14, p20 to 27, p40, p41) v o (mcu) measured with reference to pin vss. output transistor in shut-off state. ?0.3 to vcc+0.3 v circuit current (mcu: p11 to p14, p20 to p27, p40, p41) i oh (mcu) 0 to 1 (note 1) ma circuit current (mcu: p00 to p07, p20 to p23, p40, p41) i ol1 (mcu) 0 to 2 (note 2) ma circuit current (mcu: p11 to p14) i ol2 (mcu) 0 to 6 (note 2) ma circuit current (mcu: p24 to p27) i ol3 (mcu) 0 to 10 (note 2) ma power dissipation pd ta = 25c 2000 mw thermal reduction kt 20 mw/c operating ambient temperature topr ?10 to 65 c storage temperature tstg ?40 to 125 c notes: 1. the sum of currents flowing from the ic should not exceed 20 ma. 2. the sum of currents flowing into the ic (iol1+iol2) should not exceed 30 ma. 3. pin names for the different quantities are given as follows. (1) dedicated pins: dedicated pin name (2) double/triple-function ports *when standards are the same: i/o port name *when standard of functions other than the i/o port are different: function pin name recommended operating conditions item symbol min. typ. max. unit power supply voltage (mcu) (note 1) vdd(mcu) 4.75 5.0 5.25 v power supply voltage1 (asic: pin22) vcc1(asic) 4.75 5.0 5.25 v power supply voltage2 (asic: pin47) vcc2(asic) 7.6 8.0 8.4 v power supply voltage3 (asic: pin49) vcc3(asic) 7.6 8.0 8.4 v power supply voltage4 (asic: pin31) vcc4(asic) 8.3 8.7 9.1 v power supply voltage (mcu) vss 0 0 0 v ?"h" input voltage (mcu: p00 to p07, p11 to p14, p20 to p27, p40 to p45, reset ) v ih1 0.8v dd ?v dd v "h" input voltage (mcu: scl1, scl2, sda1, sda2)(using i 2 c-bus) v ih2 0.7v dd ?v dd v "l" input voltage (mcu: p00 to p07, p11 to p14, p20 to p27, p40 to p45) v il1 0 ? 0.4v dd "l" input voltage (mcu: scl1, scl2, sda1, sda2)(using i 2 c-bus) v il2 0 ? 0.3v dd v "l" input voltage (note 2) (mcu: reset , tim3, int1, int2, int3, s in , s clk ) v il3 0 ? 0.2v dd v "h" output average current (note 3) (mcu:p10 to p16, p20 to 27) i oh ??1 ma
m61280m8-xxxfp rev.1.0, sep.23.2003, page 4 of 53 recommended operating conditions (cont.) item symbol min. typ. max. unit "l" output average current (note 4) (mcu:p00 to p14, p20 to p23) i ol1 ??2 ma "l" output average current (note 4) (mcu:p11 to p14) i ol2 ??6 ma "l" output average current (note 5) (mcu:p24 to p27) i ol3 ??10ma oscillation frequency (cpu operation) (note 6) (mcu: x in ) f(x in ) 7.9 8.0 8.1 mhz oscillation frequency (subclock operation) (mcu: x cin ) f(x cin )293235khz input frequency (mcu:tim3, int1, int2,.int3 ) fhs 1 ? ? 100 khz input frequency (mcu: sclk) fhs 2 ? ? 1 mhz input frequency (mcu: scl1,scl2) hs 3 ? ? 400 khz input amplitude (mcu: tv video signal cvin) vi 1.5 2.0 2.5 v notes: 1. in order to eliminate power supply noise, a 0.1 f or greater capacitor should be connected externally across power supply pins vdd and vss. in addition, a 0.1 f or greater capacitor should also be connected across vdd and cnvss. (the recommended crystal oscillator is murata model no. csa8.00mtz (8.00 mhz), shown in the measurement circuit diagram.) 2. pin names for the different quantities are given as follows. (1) dedicated pins: dedicated pin name (2) double/triple-function ports *when standards are the same: i/o port name *when standard of functions other than the i/o port are different: function pin name 3. the sum of currents flowing from the ic should not exceed 20 ma. 4. the sum of currents flowing into the ic (iol1+iol2) should not exceed 30 ma. 5. the sum of the average currents of ports p24 to p27 flowing into the ic should not exceed 20 ma. 6. when using a cpu oscillation circuit (xin, xout), a crystal oscillator or a ceramic resonator should be used. thermal derating (maximum rating)
m61280m8-xxxfp rev.1.0, sep.23.2003, page 5 of 53 i 2 c bus table 1. slave address = bah (write), bbh (read) a6 a5 a4 a3 a2 a1 a0 r/w 10111011/0 2. write table (input bytes) 3. read table (output byts) d7 d6 d5 d4 d3 d2 d1 d0 killerb 2win wideb vfreeb vconib 0 0 hcoinb 1
m61280m8-xxxfp rev.1.0, sep.23.2003, page 6 of 53 4. bus functions ? write function bit sub add data discription initial note audio att 7 10h d0-d6 pin 34 audio output level adjustment 00h audio sw 2 11h d0-d1 audio input switching; 0: audio 1, 1: audio 2, 2: audio 3 x0h audio audio mute 1 10h d7 pin 34 audio output on/off (mute) switching; 0: audio on (non-muted), 1: mute 0 video tone 6 0ah d0-d5 sharpness level control 20h v latch contrast control 7 00h d0-d6 contrast level control 40h v latch osd contras clip 1 00h d7 osd (ext rgb) contrast lower-limit clipping on/off; 0: clipping on, 1: clipping off 0 v latch y dl time adj 2 0ch d0-d1 y signal delay adjustment x0h y dl fine adj 1 0ch d2 y signal delay fine adjustment 0 vidio sw 3 0bh d3 video input pins 26/24/20/30 switching; 0: pin 26, 1: pin 24, 2: pin 20, 3: pin 30 x0h v latch y sw lpf 1 0ch d3 pin 14 (y sw out) output f-characteristic switching; 0: flat, 1: lpf (fc = 700 khz) 0 vidio mute 1 0ah d7 y signal output on/off (mute) switching; 0: mute off, 1: mute 0 trap off 1 07h d3 y signal chroma trap on/off switching; 0: trap on, 1: trap off 0 c-trap adj 2 1dh d0-d1 chroma trap frequency fine adjust x0h black stretch off 1 0bh d7 black stretch circuit on/off switching; 0: black stretch on, 1: black stretch off 0 black stretch cont 3 0bh d4-d6 black stretch charge, discharge time constant adjustment; d4, d5: charge time constant adjustment; d6: discharge time constant adjustment 0xh video black dicharge2 1 1dh d3 black stretch discharge time constant adjustment; discharge time constant adjustment 0xh tint control 7 08h d0-d6 hue control 40h v latch color control 7 09h d0-d6 color level control 40h v latch take off 1 07h d0 chroma bpf take-off function on/off switching; 0: bpf; 1: take off 0 c angle95 1 0ch d4 color demodulation angle switching; 0: 103 deg, 1: 95 deg 0 killer level 1 07h d1 colorkiller sensitivity switching (active shallow direction); 0: 40 db, 1: 35 db 0 force mono 1 02h d7 forced b/w mode; 0: normal; 1: b/w 0 force color 1 1dh d2 forced color mode; 0: normal; 1: color 0 chroma fsc free 1 07h d6 x?tal oscillation circuit forced free-running mode; 0: off, 1: free-running 0 brightness control 8 01h d0-d7 bright level control 80h v latch drive (r) 7 02h d0-d6 r output level control 40h drive (b) 7 03h d0-d6 b output level control 40h cut off (r) 8 04h d0-d7 r output dc level control 80h cut off (g) 8 05h d0-d7 g output dc level control 80h cut off (b) 8 06h d0-d7 b output dc level control 80h blue back 1 09h d7 blue back screen on/off switching; 0: off, 1: blue back 0 whiteback 1 03h d7 white raster on/off switching; 0: off, 1: white back 0 abcl 1 07h d5 abcl on/off switching; 0: off, 1: abcl on 0 abcl gain 1 07h d4 abcl sensitivity low/high switching; 0: low, 1: hi 0 osd bright 1 1fh d3 osd level switching; 0: normal, 1: ?8% 0 acl off 1 07h d7 acl on/off switching; 0: normal, 1: acl max 0 htone 1 07h d2 halftone on/off switching; 0: normal, 1: halftone 0 rgb fastblk hi 1 0bh d3 fastblk switching; 0: normal, 1: hi (full-screen osd mode) 0
m61280m8-xxxfp rev.1.0, sep.23.2003, page 7 of 53 ? write (cont.) function bit sub add data discription initial note afc2 h phase 4 0fh d0-d3 screen horizontal position adjustment x8h v out stop 1 0eh d7 pin 38 vout (ramp) forced stop mode (when stopped, pin 38 at dc gnd level); 0: vout, 1: stop 0 service sw 1 0dh d7 vertical output on/off switching; 0: vertical output on, 1: vertical output off 0 h start 1 0fh d7 horizontal output out/stop switching; 0: stop, 1: h out 0 afc1 gain 3 12h d0-d2 horizontal afc gain adjustment; 000: low to 111: hi x4h afc2 gain down 1 0fh d4 horizontal afc2 gain high/low switching; 0: high, 1: low 0 h vco adj 3 1ch d0-d2 h vco free-running frequency adjustment x4h v shift 3 0dh d0-d2 vertical ramp start timing adjustment x0h v-size 6 0eh d0-d5 vertical ramp amplitude adjustment 20h h-free 1 0fh d6 horizontal output forced free-running mode on/off switching; 0: off, 1: horizontal free-running 0 v-free 1 0eh d6 vertical output forced free-running mode on/off switching; 0: off, 1: vertical free-running 0 s slice down 2 0dh d4-d5 sync detection slice level switching (0: 50%, 1: 30%, 2: 40%, 3: 25%) 0xh slice det down 1 0dh d6 0: normal, 1: lower sync detection sensitivity (end of video signal only) 0 hv blk off 1 0ah d6 horizontal/vertical blanking on/off switching; 0: blanking on, 1: blanking off 0 v sync det time 1 12h d3 vertical minimum sync detection width switching; 0: sync detect width =18 s, 1: sync detect width =14 s 0 v1 window 1 0ch d7 vertical sync detection switching (1 window/2 windows); 0: 2 windows, 1: 1 window 0 bgpfbp off 1 08h d7 internal bgp on/off switching when no fbp input; 0: bgp on, 1: bgp off 0 def c-sync adj 3 1eh d0-d2 c-sync output lpf cutoff frequency adjustment x0h monitoring 4 11h d4-d7 pin 18 intelligent monitor mode switching 0xh ? read hconb 1 00h d1 horizontal sync detection; "1" when asynchronous ? 1 00h d2 0 ? 1 00h d3 0 vcoinb 1 00h d4 vertical sync detection; "1" when asynchronous vfreeb 1 00h d5 v free-running mode; 0: v free-running, 1: v lock 2win wideb 1 00h d6 vertical 2-window detection; 0: wide window, 1: narrow window killerb 1 00h d7 colorkiller information output; "1" when killer off note: functions not listed in this bus function table are used only in testing, and operation is not guaranteed.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 8 of 53 test circuit
m61280m8-xxxfp rev.1.0, sep.23.2003, page 9 of 53 input signals 1. video/chroma/rgb/def block sg no. signal description (75 ? ? ? ? termination) sg. a ntsc format apl 100% standard video signal. vertical signal is interlaced at 60 hz. sg. b in the sg.a signal, the lumi. signal frequency and amplitude can be changed. however, standard amplitude is 0.714 vp-p. in the figure on the right, the lumi. signal is represented by f. sg. c ntsc standard monochrome video signal. vertical signal is interlaced at 60 hz. sg. d ntsc format video signal; apl variable. vertical signal is interlaced at 60 hz. sg. e ntsc format monochrome video signal. in the sg.c signal, the burst and chroma part frequency and amplitude can be changed. vertical signal is interlaced at 60 hz. (standard state: veb = 0.286 v, vec = 0.572 v, feb = fec = 3.579545 mhz) sg. f fast blanking signal; synchronized with video input signal. external rgb (osd) signal; synchronized with video input signal and blanking signal.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 10 of 53 1. video/chroma/rgb/def block (cont.) sg no. signal description (75 ? ? ? ? termination) sg.g ntsc format rainbow color bar video signal. vertical signal is interlaced at 60 hz. duty 90%, variable frequency, variable level. (standard horizontal frequency = 15.734 khz, vertical frequency = 60 hz, 1 vp-p) sg. h duty variable (standard 95%), frequency variable, level variable (standard: horizontal frequency = 15.734 khz, vertical frequency = 60 hz, 1 vp-p) sg. i sg. j ntsc format standard color bar video signal; vertical signal is interlaced at 60 hz. sg. k ntsc format, standard 8-step wave signal; vertical signal is interlaced at 60 hz. sg. l ntsc format red raster signal; vertical signal is interlaced at 60 hz. 2. audio block sg no. signal description (50 ? ? ? ? termination) sg.au fo = 400 hz, 500 mvrms, cw
m61280m8-xxxfp rev.1.0, sep.23.2003, page 11 of 53 setup instructions for evaluation pcb 1. horizontal blanking pulse adjustment the horizontal blanking pulse timing and pulse width are adjusted using the variable resistances of a one-shot multivibrator, as shown below. the timing is adjusted to 8 s using the pin 15 variable resistance of the m74ls221p ttl ic. also, the pulse width is adjusted to 12 s using the pin 7 variable resistance. 2. h vco adjustment prior to measurement of the m61280mx-xxxfp, the following method is used for h vco adjustment. 1. the h vco control i 2 c bus data (1 ch d0-d2) is adjusted, and the pin 46 (h out) frequency is set to approx. 15.734 khz.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 12 of 53 electrical characteristics, asic (ta = 25c) imput signal limits symbol item pin sg test point min typ max unit notes icc standard conditions pins 4, 7=0 v; pins 9, 10 = 5 v; pins 23, 65 = 0 v; pins 47, 49 = 8 v icc5v 5 v circuit current (pin 22) ? ? 22 40 55 70 ma mcu/video/chroma vcc icc8v 8 v circuit current ? ? 47,48, 49 27 42 57 ma deflection/rgb drive 8 v vcc icc12 pin 47 circuit current ? ? 47 ? 23 ? ma reference data; deflection/vcc icc49 pin 49 circuit current ? ? 49 ? 19 ? ma reference data; rgb drive/audio 8 v vcc icc31 pin 31 circuit current ? ? 31 3 6 9 ma 8.7 vreg vcc power power supply circuit standard conditions pins 4, 7 = 5 v; pins 9, 10 = 5 v; pins 23, 65 = 0 v; pins 47, 49 = 8 v vth9 power on control threshold voltage ? ? 9 2.6 3 3.4 v v40h 8.7 vreg output voltage 1 ? ? 40 8.3 8.7 9.1 v pin 9 = 5 v v40l 8.7 vreg output voltage 2 ? ? 40 ? 0 0.3 v pin 9 = 0 v v28 5.7 vreg output voltage 1 ? ? 28 5.55 5.8 6.05 v pin 9 = 5 v v18h1 mcu 5.7 vreg output voltage 1 ? ? 18 5.45 5.7. 5.95 v pin 9 = 5 v v18h2 mcu 5.7 vreg output voltage 2 ? ? 18 5.45 5.7 5.95 v pin 9 = 0 v reset reset standard conditions pins 4, 7 = 5 v; pins 9, 10 = 5 v; pins 23, 65 = 0 v; pins 47, 49 = 8 v v13h maximum reset output voltage ? ? 13 4.5 5 5.5 v v13l minimum reset output voltage ? ? 13 ? 0 0.5 v th9 reset threshold voltage ??9 44.24.4v i 2 c i 2 c standard conditions ? ? ? ? ? ? ? iack ack current ? ? ? 1 ? ma reference data vil scl/sda vth (l) ? ? 56,58 0.0 0.75 1.5 v vih scl/sda vth (h) ? ? 56,58 3.5 4.25 5.0 v f scl clock frequency ? ? 56 ? ? 100 khz
m61280m8-xxxfp rev.1.0, sep.23.2003, page 13 of 53
m61280m8-xxxfp rev.1.0, sep.23.2003, page 14 of 53 imput signal limits symbol item pin sg test point min typ max unit notes audio audio standard conditions pins 4, 7 = 5 v; pins 9, 10 = 5 v; pins 23, 65 = 0 v; pins 47, 49 = 8 v geau1 audio gain1 27 sg.au 34 ?3 0 3 db expressed as 20 log (measured value/input amplitude) geau2 audio gain2 25 sg.au 34 ?3 0 3 db expressed as 20 log (measured value/input amplitude) geau3 audio gain3 21 sg.au 34 ?3 0 3 db expressed as 20 log (measured value/input amplitude) vol-max maximum audio output amplitude 27 sg.au 34 350 500 720 mvms vol-min maximum audio output attenuation 27 sg.au 34 ? ?65 ?60 db expressed as 20 log (measured value / input amplitude)
m61280m8-xxxfp rev.1.0, sep.23.2003, page 15 of 53 imput signal limits symbol item pin sg test point min typ max unit notes video video standard conditions ? ? ? ? ? ? ? pins 4, 7 = 5 v; pins 9, 10 = 5 v; pins 23, 65 = 0 v; pins 47, 49 = 8 v 2agv1 video sw1 output level (cvbs1 input) 26 sg.a 14 1.6 2.0 2.6 vpp 2agv2 video sw2 output level (cvbs2 input) 24 sg.a 14 1.6 2.0 2.6 vpp 2agv3 video sw3 output level (cvbs3 input) 20 sg.a 14 1.6 2.0 2.6 vpp 2agvy video swy output level (y/c input) 30 sg.a 14 1.6 2.0 2.6 vpp ymax maximum video output 26 sg.a 50,51, 52 2.9 4.2 5.6 v gy video gain 26 sg.a 50,51, 52 12 15 18 db fby video frequency characteristic 26 sg.b 50,51, 52 ?4 ?1 ? db f = 5 mhz, c-trap: off crf1 chroma trap attenuation 1 26 sg.c 50,51, 52 ? ? ?18 db crf2 chroma trap attenuation 2 26 sg.l 50,51, 52 ? ? ?6.5 db ydl1 ydl time 1 26 sg.a 50,51, 52 190 260 330 ns ydl2 ydl time 2 26 sg.a 50,51, 52 100 150 250 ns ydl2 = measured value ? ydl1 measured value ydl3 ydl time 3 26 sg.a 50,51, 52 100 150 250 ns ydl3 = measured value ? ydl2 measured value ydl4 ydl time 4 26 sg.a 50,51, 52 100 150 250 ns ydl4 = measured value ? ydl3 measured value gtnor video tone control characteristic 1 26 sg.b 50,51, 52 1.0 1.4 1.8 v f = 2.5 mhz gtmax video tone control characteristic 2 26 sg.b 50,51, 52 71014dbf = 2.5 mhz gtmin video tone control characteristic 3 26 sg.b 50,51, 52 ?6 ?2 2 db f = 2.5 mhz gt2m video tone control characteristic 4 26 sg.b 50,51, 52 ?1 2 5 db f = 2 mhz gt5m video tone control characteristic 5 26 sg.b 50,51, 52 ?9 ?5 ?1 db f = 5 mhz bls black stretch characteristic 26 sg.k 50,51, 52 0.01 0.03 0.05 v vmf video mute function 26 sg.a 50,51, 52 ? ?45 ?35 db
m61280m8-xxxfp rev.1.0, sep.23.2003, page 16 of 53
m61280m8-xxxfp rev.1.0, sep.23.2003, page 17 of 53 imput signal limits symbol item pin sg test point min typ max unit notes chroma chroma standard conditions ? ? ? ? ? ? ? pins 4, 7 = 5 v; pins 9, 10 = 5 v; pins 23, 65 = 0 v; pins 47, 49 = 8 v cnorr chroma standard output (r-y) 26 sg.c 33 390 560 790 mvpp cnorb chroma standard output (b-y) 26 sg.c 33 640 920 1290 mvpp acc1 acc characteristic 1 26 sg.e 33 ?3 0 3 db veb, vec: standard input level +6 db acc2 acc characteristic 2 26 sg.e 33 ?6.5 0 1.5 db veb, vec: standard input level ?18 db ov chroma overload characteristic 26 sg.e 33 ?3 2 5 db vec = 800 mv vikn killer operation input level 26 sg.e 33 ? ?40 ?35 db veb, vec: variable killp color remaining on colorkilling 26 sg.e 33 ? ?45 ?30 db veb = 0 mv apcu apc pull-in range (upper) 26 sg.e 33 300 600 ? hz feb = fec: variable apcl apc pull-in range (lower) 26 sg.e 33 ? ?600 ?300 hz feb = fec: variable r/bn demodulation ratio 26 sg.e 33 0.40 0.57 0.80 ? feb = feb + 50 khz r-yn1 demodulation angle 1 26 sg.e 33 86 103 120 deg feb = feb + 50 khz r-yn2 demodulation angle 2 26 sg.e 33 78 95 112 deg feb = feb + 50 khz tc1 tint control characteristic 1 26 sg.e 33 30 45 60 deg feb = feb + 50 khz tc2 tint control characteristic 2 26 sg.e 33 30 45 60 deg feb = feb + 50 khz ffsc fsc output frequency 26 sg.c 32 3.5793 3.5796 3.5799 mhz vfsc fsc output amplitude 26 sg.c 32 250 500 800 mvpp ffscfree fsc output frequency in fsc free mode 26 sg.c 32 3.5790 3.5795 3.5810 mhz vfscfree fsc output amplitude in fsc free mode 26 sg.c 32 250 500 800 mvpp
m61280m8-xxxfp rev.1.0, sep.23.2003, page 18 of 53
m61280m8-xxxfp rev.1.0, sep.23.2003, page 19 of 53 imput signal limits symbol item pin sg test point min typ max unit notes rgb rgb standard conditions ? ? ? ? ? ? ? pins 4, 7 = 5 v; pins 9, 10 = 5 v; pins 23, 65 = 0 v; pins 47, 49 = 8 v vblk output blanking voltage 26 sg.a 50,51, 52 00.10.3v gytyp contrast control characteristic 1 26 sg.b 50,51, 52 2.2 2.8 3.3 vpp f = 100 khz gymin contrast control characteristic 2 26 sg.b 50,51, 52 ? 200 300 mvpp f = 100 khz gyenor contrast control characteristic 3 26 sg.a 50,51, 52 2.2 2.8 3.3 vpp pin 53 = 2.9 v gyemin contrast control characteristic 4 26 sg.a 50,51, 52 ? 100 200 mvpp pin 53 = 0.0 v gyeclip contrast control characteristic 5 59,60, 61 sg.f 50,51, 52 0.50 0.65 0.80 vpp pin 65 = 2.0 v lum nor brightness control characteristic 1 26 sg.d 50,51, 52 1.7 2.1 2.5 v vy = 0.0 v lum max brightness control characteristic 2 26 sg.d 50,51, 52 2.3 3 ? v vy = 0.0 v lum min brightness control characteristic 3 26 sg.d 50,51, 52 ? 1.3 2 v vy = 0.0 v d(r)1 r driving control characteristic 1 26 sg.a 50 2.0 4.0 6.0 db d(b)1 b driving control characteristic 1 26 sg.a 52 2.0 4.0 6.0 db d(r)2 r driving control characteristic 2 26 sg.a 50 ?5.0 ?3.0 ?1.0 db d(b)2 b driving control characteristic 2 26 sg.a 52 ?5.0 ?3.0 ?1.0 db exd1(r) digital osd (r) i/o characteristic 1 61,65, 26 sg.f, sg.a 50 1.0 1.5 2.0 vpp vosd = 1.0 v, sw61 = on exd1(g) digital osd (g) i/o characteristic 1 61,65, 26 sg.f, sg.a 51 1.0 1.5 2.0 vpp vosd = 1.0 v, sw60 = on exd1(b) digital osd (b) i/o characteristic 1 61,65, 26 sg.f, sg.a 52 1.0 1.5 2.0 vpp vosd = 1.0 v, sw59 = on exd1(r-g) digital osd (r-g) amplitude difference ? ? ? ?350 0 350 mv exd1(g-b) digital osd (g-b) amplitude difference ? ? ? ?350 0 350 mv exd1(b-r) digital osd (b-r) amplitude difference ? ? ? ?350 0 350 mv exd2(r-g) digital osd black level dc voltage difference (r-g) ? sg.f 50,51 ?250 0 250 mv exd2(g-b) digital osd black level dc voltage difference (g-b) ? sg.f 51,52 ?250 0 250 mv ofrg offset voltage (r-g) 26 sg.d 50,51 ?100 0 100 mv vy = 0.0 v ofbg offset voltage (b-g) 26 sg.d 51,52 ?100 0 100 mv vy = 0.0 v c(r)1 r cutoff control characteristic 1 26 sg.d 50 2.6 2.9 3.2 v vy = 0.0 v c(g)1 g cutoff control characteristic 1 26 sg.d 51 2.6 2.9 3.2 v vy = 0.0 v c(b)1 b cutoff control characteristic 1 26 sg.d 52 2.6 2.9 3.2 v vy = 0.0 v c(r)2 r cutoff control characteristic 2 26 sg.d 50 1.1 1.4 1.7 v vy = 0.0 v c(g)2 g cutoff control characteristic 2 26 sg.d 51 1.1 1.4 1.7 v vy = 0.0 v
m61280m8-xxxfp rev.1.0, sep.23.2003, page 20 of 53
m61280m8-xxxfp rev.1.0, sep.23.2003, page 21 of 53 imput signal limits symbol item pin sg test point min typ max unit notes c(b)2 26 sg.d 52 1.1 1.4 1.7 v vy = 0.0 v ccon1 26 sg.c 51 2 5 8 db ccon2 26 sg.c 51 ? ?15 ?10 db ccon3 26 sg.c 51 ? ?40 ?35 db mtxrb 26 sg.g 50,52 0.81 0.98 1.08 ? mtxgb 26 sg.g 51,52 0.29 0.37 0.45 ? dosd1 61,65, 26 sg.f, sg.a 50 ? 0.05 0.13 s vosd = 1.0 v, sw59 = on dosd2 61,65, 26 sg.f, sg.a 50 ? 0.05 0.13 s vosd = 1.0 v, sw59 = on bb(r) 26 sg.a 50 1.7 2.1 2.5 v bb(g) 26 sg.a 51 1.7 2.1 2.5 v bb(b) 26 sg.a 52 2.7 3.7 4.7 v wb 26 sg.a 50,51, 52 2.7 3.7 4.7 v wbl-rb 26 sg.a y=30% 50,52 ?80.0 ?20.0 10.0 mv white level difference with, without burst, with reference to pin 52 (bout) wbl-gb 26 sg.a y=30% 51,52 ? 10.0 80.0 mv white level difference with, without burst, with reference to pin 52 (bout)
m61280m8-xxxfp rev.1.0, sep.23.2003, page 22 of 53 imput signal limits symbol item pin sg test point min typ max unit notes def deflection system standard conditions ? ? ? ? ? ? ? pins 4, 7 = 5 v; pins 9, 10 = 5 v; pins 23, 65 = 0 v; pins 47, 49 = 8 v fh1 horizontal free- running frequency 1 ? ? 46 15.3 15.7 16.1 khz fh2 horizontal free- running frequency 2 ? ? 46 14.7 15.1 15.5 khz fh3 horizontal free- running frequency 3 ? ? 46 15.8 16.2 16.6 khz hfree forced horizontal free-running operation 26 sg.a 46 15.3 15.7 16.1 khz in hfree operation (0fh: d6 = 1) fphu horizontal pull-in range (upper) 26 sg.h 46 250 500 ? hz variable input frequency fphl horizontal pull-in range (lower) 26 sg.h 46 ? ?500 ?250 hz variable input frequency hpt1 horizontal pulse timing 1 26 sg.a 46 4.5 6.0 7.5 s hpt2 horizontal pulse timing 2 26 sg.a 46 3.5 5.0 6.5 s hptw horizontal pulse width ? ? 46 21 25 29 s vh horizontal pulse amplitude ? ? 46 4.7 5.4 ? v hstop horizontal pulse stop operation ? ? 46 ? 0.0 0.5 v when ofh: d7 = 0, confirm that horizontal pulse is stopped afcg afc gain operation 26 sg.a 43 2.0 3.0 10.0 db when 12h is 03, 07, measure and compute amplitude fv vertical free-running frequency ? ? 38 55 60 65 hz vfree forced vertical free- running operation 26 sg.a 38 55 60 65 hz in vfree operation (0eh: d6 = 1) svc service mode operation ? ? 38 1.0 1.5 2 v fpvu vertical pull-in frequency (upper) 26 sg.h 38 63 67 ? hz variable input frequency fpvl vertical pull-in frequency (lower) 26 sg.h 38 ? 55 57 hz variable input frequency vrsi1 vertical ramp size 26 sg.a 38 1.6 2.0 2.4 vpp vrsc1 vertical ramp size control range 1 26 sg.a 38 2.0 2.4 2.8 vpp vrsc2 vertical ramp size control range 2 26 sg.a 38 0.8 1.2 1.6 vpp vrpo1 vertical ramp position control range 1 26 sg.a 38 18 38 58 s vrpo2 vertical ramp position control range 2 26 sg.a 38 805 825 845 s measured value ? vrpo 1 vblkw vertical blanking width 26 sg.a 50,51, 52 1.32 1.47 1.62 ms wvss minimum width in minimum sync operation 26 sg.i 38 14 ? ? s variable input signal duty
m61280m8-xxxfp rev.1.0, sep.23.2003, page 23 of 53
m61280m8-xxxfp rev.1.0, sep.23.2003, page 24 of 53 imput signal limits symbol item pin sg test point min typ max unit notes monitoring intelligent monitor system standard conditions ? ? ? ? ? ? ? pins 4, 7 = 5 v; pins 9, 10 = 5 v; pins 23, 65 = 0 v; pins 47, 49 = 8 v moni1 intelligent monitor 1 (composite sync) 26 sg.a 33 ? 4.9 ? v reference data moni6 intelligent monitor 6 (video sw output) 26 sg.a 33 ? 0.95 ? vpp reference data moni7 intelligent monitor 7 (g out) 26 sg.a 33 ? 2.0 ? vpp reference data. amplitude measured from blanking level moni8 intelligent monitor 8 (r out) 26 sg.a 33 ? 2.0 ? vpp reference data. amplitude measured from blanking level moni9 intelligent monitor 9 (b out) 26 sg.a 33 ? 2.0 ? vpp reference data. amplitude measured from blanking level moni10 intelligent monitor 10 (acl) ? ? 33 ? 4.3 ? v reference data moni11 intelligent monitor 11 (v sync) 26 sg.a 33 ? 4.0 ? vpp reference data moni12 intelligent monitor 12 (h out) 26 sg.a 33 ? 3.0 ? vpp reference data moni14 intelligent monitor 14 (def vcc) ? ? 33 ? 2.90 ? v reference data moni15 intelligent monitor 15 (video/chroma vcc) ? ? 33 ? 2.70 ? v reference data moni16 intelligent monitor 16 (hi vcc) ? ? 33 ? 2.90 ? v reference data ? intelligent monitor map 1. sub address: 11hd4 ? d7 2. output pin: pin33 3. specification 11h 11h output no. hexd7d6d5d4signal 1 0 0 0 0 0 composite sync 2 10001? 3 20010? 4 30011? 5 40100? 6 50101y sw out 7 60110g out 8 70111r out 9 81000b out 10 91001acl/abcl 11 a1010v sync 12 b1011h out 13 c 1 1 0 0 def vcc 14 d 1 1 0 1 def vcc 15 e1110v/c vcc 16 f1111hi vcc
m61280m8-xxxfp rev.1.0, sep.23.2003, page 25 of 53
m61280m8-xxxfp rev.1.0, sep.23.2003, page 26 of 53 method of measurement of electrical characteristics video clock 2agtv1-3 video sw output level (cvbs1-3 input) 2agevy video sw output level (y input) 1. input sg.a to pin 26 (cvbs1), or pin 24 (cvbs2), or pin 20 (cvbs3), or pin 30 (yin). 2. the amplitude (p-p) at pin 14 is measured. * in order to select tv or external input, use the subaddress 0bh. y max maximum video output 1. input sg.a to pin 26. 2. measure the amplitude (p-p) other than the blanking part of the output of pins 50, 51, 52. fby video frequency characteristic 1. input sg.b (5 mhz, 0.4 vp-p) to pin 26. 2. measure the amplitude (p-p) other than the blanking part of the output of pins 50, 51, 52, take the result to be yb. 3. fyb is defined as follows. crf1 chroma trap attenuation 1 (normal r/g/b output) trf maximum chroma trap attenuation 1. input sg.c to pin 26, measure the 3.58 mhz frequency level with trap on/off (07h d3) data 1, take his to be n 0 . 2. also measure the level with trap on/off (07h d3) data 0. 3. crf1 is defined as follows. 4. take the minimum value of crf1 when the i 2 c bus data of the trap fine adj (12h d0 / d1) is adjusted to be trf. crf2 chroma trap attenuation 2 (normal r / g / b output) 1. input sg.l to pin 26. the input 3.58 mhz frequency level is n 1 . 2. measure the 3.58 mhz frequency level when trap on/off (07h d3) data 0. 3. crf2 is defined as follows.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 27 of 53 ydl1: ydl time 1 1. input sg.a to pin 26. 2. measure the delay time relative to the input signal of pins 50, 51, 52. the delay time at 50% rise level is measured. ydl2, 3, 4: ydl time 2, 3, 4 1. input sg.a to pin 26. 2. measure the delay time of the input signal and the pin 50, 51, 52 output signals. 3. ydl2, ydl3, ydl4 are defined as follows. ydl2 = measured value (ns) ? ydl1 (measured value) ydl3 = measured value (ns) ? ydl2 (measured value) ydl4 = measured value (ns) ? ydl3 (measured value) gtmax video tone control characteristic 2 1. input sg.b (f = 2.5 mhz) to pin 26. 2. the output amplitude of pins 50, 51, 52 when the video tone data is at the center (20 h) is taken to be gtnor. 3. the output amplitude of pins 50, 51, 52 when the video tone data is maximum is measured. 4. gtmax is defined as follows. gtmin video tone control characteristic 3 1. input sg.b (f = 2.5 mhz) to pin 26. 2. the output amplitude of pins 50, 51, 52 when the video tone data is at the center (20 h) is taken to be gtnor. 3. the output amplitude of pins 50, 51, 52 when the video tone data is minimum is measured. 4. gtmin is defined as follows. gt2m video tone control characteristic 4 1. take pin 50, 51, 52 output amplitude when input signal frequency is 2.5 mhz to be gtnor. 2. input sg.b (f = 2 mhz) to pin 26. 3. measure pin 50, 51, 52 output amplitude. 4. gt2m is defined as follows
m61280m8-xxxfp rev.1.0, sep.23.2003, page 28 of 53 gt5m video tone control characteristic 5 1. take pin 50, 51, 52 output amplitude when input signal frequency is 2.5 mhz to be gtnor. 2. input sg.b (f = 2 mhz) to pin 26. 3. measure pin 50, 51, 52 output amplitude. 4. gt5m is defined as follows. bls black stretch characteristic 1. input sg.k to pin 26. 2. with black stretch off (0bh d7 = 1), adjust the contrast (00h) and brightness (01h), and set the pin 50, 51, 52 output level of the first stage (lowest stage) to 2.0 v, and the output level of the eighth stage (highest stage) to 4.6 v. 3. change black stretch to on (0bh d7 = 0), and measure the pin 50, 51, 52 first stage output level. 4. bls is defined as follows. vmf video mute function 1. input sg.a to pin 26. 2. with the mute switch (0ah d7) on "vmfon", off "vmfoff", measure the output amplitude. 3. vmf is defined as follows.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 29 of 53 chroma block cnorr chroma standard output (r-y) cnorb chroma standard output (b-y) 1. input sg.c to pin 26. 2. when "test mode" i 2 c data is 1fh d2=1, 1dh d5=1, take the pin 33 output amplitude when 1dh d6 = 1, d7 = 1 and d6=0, d7=1 to be the chroma standard output (r-y) and chroma standard output (b - y), respectively. acc1 acc characteristic 1 1. input sg.e (eb = 570 mv: level + 6 db) to pin 26. 2. measure the pin 33 output amplitude. 3. acc1 is defined as follows. acc2 acc characteristic 2 1. input sg.e (input level: -18 db) to pin 26. 2. measure the pin 33 output amplitude. 3. acc2 is defined as follows. ov chroma overload characteristic 1. input sg.e (eb = 800 mvp-p: chroma + 3 db) to pin 26. 2. measure the pin 33 output amplitude. 3. ov is defined as follows. vikn killer operation input level 1. input sg.e (variable level) at input level 0 db to pin 26. 2. while monitoring the pin 33 output amplitude, lower the input level, and measure the input level when the output amplitude vanishes.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 30 of 53 killp hue remaining with killer 1. input sg.e (level: -40 db) to pin 26. 2. measure the pin 33 output amplitude. apcu apc pull-in range (upper) apcl apc pull-in range (lower) 1. input sg.e (feb-fec-3.579545 mhz) to pin 26. 2. after raising the frequency until the output from pin 33 vanishes, lower the frequency, and take the point at which an output appears to be fu. 3. after lowering the frequency until the output from pin 33 vanishes, raise the frequency, and take the point at which an output appears to be fl. 4. apcu and apcl are defined as follows. apcu = fu ? 3579545 hz apcl = fl ? 3579545 hz r/bn demodulation ratio r-y/b-y 1. input sg.e (eb = single chroma = ec + 50 khz) to pin 26. 2. take the pin 33 output amplitude when "test mode" i 2 c data is 1dh d6 = 1, d7 = 1 to be vry. 3. take the pin 33 output amplitude when "test mode" i 2 c data is 1dh d6 = 0, d7 = 1 to be vby. 4. r/bn is defined as follows. r-yn demodulation angle 1. input sg.e (eb = single chroma = ec + 5 khz) to pin 26. 2. take the pin 33 output amplitude when "test mode" i 2 c data is 1dh d6 = 1, d7 = 1 to be vry. 3. take the pin 33 output amplitude when "test mode" i 2 c data is 1dh d6 = 0, d7 = 1 to be vby. 4. r/yn is defined as follows. * the vector is determined taking the demodulator gain into account.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 31 of 53 tc1 tint control characteristic 1 tc2 tint control characteristic 2 1. input sg.c (see figure below) to pin 26. measure the absolute angle with reference to the pin 33 output voltage, referring to the figure below. 2. take the tint data center part (08h data 3ch) to be reference angle "tc", determine the tint data maximum and minimum values. tc1 and tc2 are defined as follows. tc1 = tcmax ? tc(deg) tc2 = tc ? tcmin(deg) ffsc fsc output frequency vfsc fsc output amplitude 1. input sg.c to pin 26. 2. measure the pin 32 output frequency and amplitude. ffscfree fsc output frequency in fsc free mode vfscfree fsc output amplitude in fsc free mode 1. input sg.c to pin 26. 2. measure the pin 32 output frequency and amplitude with fsc free (07h d6) data 1. rgb interface block vblk output blanking voltage 1. input sg.a to pin 26. 2. measure the voltage of the pin 50, 51, 52 pedestal and blanking parts.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 32 of 53 gymax contrast control characteristic 1 gymin contrast control characteristic 2 1. input sg.b (f = 100 khz) to pin 26. 2. measure the pin 50, 51, 52 output amplitude. gyenor contrast control characteristic 3 gyemin contrast control characteristic 4 1. input sg.a to pin 26. 2. measure the pin 50, 51, 52 output amplitude when applying 2.9 v and 0 v to pin 33. gyeclip contrast control characteristic 5 1. input sg.f to pins 59, 60, 61, 65. 2. minimize the contrast control data, and measure the output amplitude at and above the pedestal part of pins 50, 51, 52. the amplitude of the blanking part is not measured. lum nor brightness control characteristic 1 lum max brightness control characteristic 2 lum min brightness control characteristic 3 1. input sg.d (vy = 0 v) to pin 26. 2. measure the dc voltage other than the blanking part of the output of pins 50, 51, 52. d(r)1 r drive control characteristic 1 1. input sg.a to pin 26. 2. measure the pin 50 output amplitude when the drive control data is at center and is maximum, take the results to bedrnor and drmax respectively. 3. d (r) 1 is defined as follows. d(b)1 b drive control characteristic 1 1. input sg.a to pin 26. 2. measure the pin 52 output amplitude when the drive control data is at center and is maximum, take the results to be dbnor and dbmax respectively. 3. d(b)1 is defined as follows.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 33 of 53 d(r)2 r drive control characteristic 2 1. input sg.a to pin 26. 2. measure the pin 50 output amplitude when the drive control data is at center and is minimum, take the results to be drnor and drmin respectively. 3. d(r)2 is defined as follows. d(b)2 r drive control characteristic 2 1. input sg.a to pin 26. 2. measure the pin 52 output amplitude when the drive control data is at center and is minimum, take the results to be dbnor and dbmin respectively. 3. d(b)2 is defined as follows. exd(r) digital osd(r) input/output characteristic exd(g) digital osd(g) input/output characteristic exd(b) digital osd(b) input/output characteristic 1. input sg.f (vosd = 1.0 v) to pins 59, 60, 61, 65. 2. measure the output amplitude at and above the pedestal part in pins 50, 51, 52. the amplitude of the blanking part is not measured. exd(r-g) digital osd (r-g) amplitude difference exd(g-b) digital osd (g-b) amplitude difference exd(b-r) digital osd (b-r) amplitude difference 1. exd (r-g), exd (g-b) and exd (b-r) are defined as follows. exd(r-g) = exd(r) ? exd(g) exd(g-b) = exd(g) ? exd(b) exd(b-r) = exd(b) ? exd(r) c (r) 1 r cutoff characteristic 1 c (g) 1 g cutoff characteristic 1 c (b) 1 b cutoff characteristic 1 c (r) 2 r cutoff characteristic 2 c (g) 2 g cutoff characteristic 2 c (b) 2 b cutoff characteristic 2 1. input sg.d (vy = 0 v) to pin 26. 2. measure the dc voltage of other than the blanking part in the outputs of pins 50, 51, 52.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 34 of 53 ccon1 color control characteristic 1 ccon2 color control characteristic 2 ccon3 color control characteristic 3 1. input sg.c to pin 26. 2. measure the output amplitudes of pins 50, 51, 52 when iic data 09h = 40h, take this to be ccon0. 3. measure the output amplitudes of pins 50, 51, 52 under each set of conditions. 4. ccon1, ccon2, ccon3 are defined as follows. mtxrb matrix ratio r/b mtxgb matrix ratio g/b 1. input sg.g (rainbow color bar) to pin 26. 2. measure the output amplitude when pins 50, 51, 52 are respectively vr, vg, vb. 3. mtxrb, mtxgb are defined as follows. dosd1 digital osd switching characteristic 1 dosd2 digital osd switching characteristic 2 1. input sg.f (vosd = 1.0 v) to pins 65, 59, 60, 61. 2. measure the rise time and fall time of the output signals of pins 50, 51, 52 at and above pedestal level. the blanking part is not measured.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 35 of 53 bb(r) blue back function (r) bb(g) blue back function (g) bb(b) blue back function (b) 1. input sg.a to pin 26. 2. measure the output amplitude (p-p) of pins 50, 51, 52 other than the blanking part. wb white raster function 1. input sg.a to pin 26. 2. measure the output amplitude (p-p) of pins 50, 51, 52 other than the blanking part. wbl-rb white balance difference-rb wbl-gb white balance difference-gb 1. input sg.a (y = 30%l with burst) to pin 26. 2. measure the pin 50, 51, 52 output white level potential from gnd. measured values are taken to be m1r, m1g, m1b respectively. 3. input sg.a (y = 30%: without burst) to pin 26. 4. measure the pin 50, 51, 52 output white level potential from gnd. measured values are taken to be m2r, m2g, m2b respectively. 5. calculate the differences in measured values. 6. calculate the differences between calculated values of rch and bch with the bch measured value as reference, defined as follows.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 36 of 53 deflection block fh1 horizontal free-running frequency 1 fh2 horizontal free-running frequency 2 fh3 horizontal free-running frequency 3 1. measure the frequency of pin 46 with no input. hfree forced horizontal free-running operation 1. input sg.a to pin 26. 2. set h-free control data to on, measure the frequency at pin 46. fphu horizontal pull-in range (upper) fphl horizontal pull-in range (lower) 1. input sg.h to pin 26. 2. change the frequency of sg.h, measure the frequency range for which the pin 46 output signal and pin 26 input signal are pulled in, with respect to the video signal horizontal frequency. hpt1 horizontal pulse timing 1 hpt2 horizontal pulse timing 2 1. measure the horizontal pulse timing using the method for hpt1. 2. standard hpt2 = (measured value) ? hpt1 hptw horizontal pulse width vh horizontal pulse amplitude hstop horizontal pulse stop operation 1. confirm that when h.start sw off (0fh:d7 = 0), the horizontal output goes low.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 37 of 53 afcg afc gain operation 1. measure the pin 43 output amplitude during afc switching, taking the result when 12hd0 = 1, d1 = 1, d2 = 0 to be afctyp, and 12h d0 = 1, d1 = 1, d2 = 1 to be afcmax. 2. afcg is defined as follows. fv vertical free-running frequency 1. measure the pin 38 output frequency with no input. vfree forced vertical free-running operation 1. input sg.a to pin 26. 2. set v-free control data to on, measure the pin 38 output amplitude. scv service mode operation 1. measure the pin 38 output dc voltage with the service switch on. fpvu vertical pull-in frequency (upper) fvpl vertical pull-in frequency (lower) 1. change the sg.h vertical frequency, and measure the frequency when the pin 38 output waveform is pulled in. vrsi vertical ramp size vrsc1 vertical ramp size control range 1 vrsc2 vertical ramp size control range 2 vrpo1 vertical ramp position control range 1 rpo1 vertical ramp position control range 2 1. measure the vertical ramp timing using the same method as for vrpo1. 2. vrpo2 is defined as follows. vrpo2 = (measured value) - vrpo1
m61280m8-xxxfp rev.1.0, sep.23.2003, page 38 of 53 vblkw vertical blk width wvss minimum width at minimum sync operation 1. reduce the width of the sg.i signal, and measure the input signal width when the pin 38 output waveform pull-in is lost.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 39 of 53 electrical characteristics (mcu unit) 1. electrical characteristics (unless otherwise noted, vdd = 5 v 5%, vss = 0 v, f(xin) = 8.95 mhz, ta = ?10 to 65c) limits symbol item measurement conditions min. typ. max. unit measurement circuit osd off data slicer off ?1530ma vcc=5.25v, f(x in )=8.95mhz osd on data slicer on ?3045ma during system operation vcc=5.25v, f(x in )=0, f(x cin )=32khz, osd off, data slicer off, low power dissipation mode (cm5=?0?, cm6=?1?) ? 60 200 a vcc=5.25v, f(x in )=8mhz ? 2 4 ma during wait vcc=5.25v, f(x in )=0, f(x cin )=32khz, low power dissipation mode (cm5=?0?, cm6=?1?) ? 60 200 i cc power supply current when stopped vcc=5.25v, f(x in )=0, f(x cin )=0 ? 1 10 a 1 v oh "h" output voltage p11 ~p14, p20~p27, p40, p41 vcc=4.75v, i oh =?0.5ma 2.4 ? ? v p00 ~p07, p20~p23, p40, p41 vcc=4.75v, i ol =0.5ma ? ? 0.4 p24~p27 vcc=4.75v, i ol =10.0ma ? ? 3.0 v ol "l" output voltage p11 ~p14 vcc=4.75v i ol =3ma i ol =6ma ??0.4 0.6 v 2 v t+ - v t? hysteresis (*1) reset , int1, int2, int3, tim3,s in , s clk , scl1, scl2, sda1, sda2 vcc=5.0v ? 0.5 1.3 v 3 i izh "h" input leakage current p00 ~p07, p11~p14, p20~p27, p40~p45, reset vcc=5.25v, v i =5.25v ? ? 5 a4 i izl "l" input leakage current p00 ~p07, p11~p14, p20~p27, p40~p45, reset vcc=5.25v, v i =0v ? ? 5 a4 r bs i 2 c-bus bus switch connection resistance (between scl1 and scl2, sda1 and sda2) vcc=4.75v ? ? 130 ? 5 note: 1. when using p06, p07, p16, p23, p24, p25 as interrupt inputs or external clock inputs for timers, when using p20 to p22 as serial i / o, and when using p11 to p14 as multi-master i 2 c-bus interface pins, there is hystersis.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 40 of 53 2. test circuit a/d converter characteristics (unless otherwise noted, vdd = 5 v 5%, vss = 0 v, f(xin) = 8.95 mhz, ta = ?10 to 65c) limits symbol item measurement conditions min typ max unit ? resolution 7bits ? nonlinear 1.5 lsb ? diffierential nonlinear error 0.9 lsb v ot zero-transition error iol (sum) = ?0 ma 2 lsb v est full-scale transition error ?2 lsb
m61280m8-xxxfp rev.1.0, sep.23.2003, page 41 of 53 pin description pin no. name pin periphery notes 1 cnvss 0 v 2 3 x in xout ? 4 7 test1 test0 ? 5 vss (mcu) ? power source for mcu 0 v 6 vdd (mcu) ? power source for mcu 5.0 v 5% 8filt ? 9hlf ?
m61280m8-xxxfp rev.1.0, sep.23.2003, page 42 of 53 pin no. name pin periphery notes 10 vhold ? 11 cvin ? 12 reset ? 13 mcu reset out h: 5.0 v l: 0.0 v 14 y sw out 1.7 v 15 video/chroma gnd ? 0.0 v
m61280m8-xxxfp rev.1.0, sep.23.2003, page 43 of 53 pin no. name pin periphery notes 16 x-tal 3.58 3.3 v 17 chroma apc filter 3.2 v 18 mcu 5.7vreg out 5.7 v maximum outflow current = 2.5 ma 19 nc ? ? 20 24 26 cvbs in 3/2/1 1.7 v
m61280m8-xxxfp rev.1.0, sep.23.2003, page 44 of 53 pin no. name pin periphery notes 21 25 27 audio in 3/2/1 2.3 v 22 video/chroma vcc ? 5.0 v 23 mcu test 0 v 28 5.7 vreg out 5.7 v maxim outflow current = 5 ma 29 c in 2.1 v
m61280m8-xxxfp rev.1.0, sep.23.2003, page 45 of 53 pin no. name pin periphery notes 30 y in 1.7 v 31 vreg vcc ? 8.7 v 32 fsc out 3.0 v 33 intelligent monitor maxim outflow current = 100 a 34 audio att out 3.5 v 35 audio att filter 2.75 v to 3.25 v 36 test2 ? gnd
m61280m8-xxxfp rev.1.0, sep.23.2003, page 46 of 53 pin no. name pin periphery notes 37 v ramp feed back ? 38 ramp out 4.6 v maxim outflow current = 1 ma 39 v ramp cap ? 40 8.7 vreg out 8.7 v maximum outflow current = 1 ma 41 nc ? ? 42 h vco feedback 3.0 v
m61280m8-xxxfp rev.1.0, sep.23.2003, page 47 of 53 pin no. name pin periphery notes 43 afc filter 3.5 v 44 def gnd ? ? 45 fbp in v th : 1.0 v 46 h out v ol : 0.0 v v oh : 5.4 v maximum outflow current = 4 ma 47 def vcc ? 8v 48 nc ? ? 49 hi vcc ? 8v 50 51 52 r out g out b out ?
m61280m8-xxxfp rev.1.0, sep.23.2003, page 48 of 53 pin no. name pin periphery notes 53 acl/abcl ? 54 test2 use with only pin 54 open 59 60 61 65 p42 p43 p44 p45 ? 55 56 57 58 p14/sda2 p13/sda1 p12/scl1 p11/scl2 ? 62 63 64 70 p00/pwm0 p01/pwm1 p02/pwm2 p07/int1 ? 66 67 68 69 p03/pwm3/ad1 p04/pwm4/ad2 p05/ad3 p06/int2/ad4 ?
m61280m8-xxxfp rev.1.0, sep.23.2003, page 49 of 53 pin no. name pin periphery notes 71 72 76 77 78 p40 p41 p23/tim3 p24/tim2 p25/int3 ? 73 74 75 p20/slk/ad5 p21/sout/ad6 p22/sin/ad7 ? 79 80 p26/xcin p27/xcout ? note: voltage, current and other values appearing in the notes column are reference values, and are not guaranteed rated values.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 50 of 53 memory layout diagram
m61280m8-xxxfp rev.1.0, sep.23.2003, page 51 of 53 application circuit notes: 1. pin 54 should be kept open. 2. if a crystal oscillator other than that recommended is used, the capacitance connected to x2 (3.58 mhz xtal) must be studied. note: connections to pins 55 to 80 may differ depending on conditions of use.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 52 of 53 important information ? each application should be thoroughly studied and evaluated before making a decision. ? 47 f and higher electrolytic capacitors and 0.01 f and higher ceramic capacitors should be connected in parallel between each of the power supply pins (6, 22, 31, 47, 49) and ground. in addition, it is recommended that the connections be made as close to the ic power supply pins as possible. ? when purchasing i 2 c bus components, a license to use these components within a i 2 c bus system is provided under the i 2 c patent rights of philips corp. ? however, the bus system must conform to the i 2 c specifications stipulated by philips.
m61280m8-xxxfp rev.1.0, sep.23.2003, page 53 of 53 package dimensions lqfp80-p-1420-0.8 weight(g) ? jedec code eiaj package code lead material cu alloy 80p6u-a plastic 80pin 14 ? 20mm body lqfp ? ? ? 0.2 ? ? ? ? ? ? ? ? ? ? symbol min nom max a a 2 b c d e h e l l 1 y b 2 dimension in millimeters h d a 1 0.225 ? ? i 2 ? ? m d 14.4 ? ? m e 20.4 0? 8? 0.1 1.0 0.5 0.8 16.2 15.8 14.1 13.9 22.2 21.8 14.0 20.1 19.9 20.0 16.0 22.0 0.175 0.125 0.125 0.105 0.47 0.37 0.32 0.05 1.4 1.6 e under planning lp 0.45 0.35 10 ? ? 0.6 0.25 ? 0.75 0.65 0.2 ? x a3 recommended mount pad detail f mmp m d l 2 b 2 m e e e h e 80 65 25 40 24 1 41 64 h d d a y b x m e f a 1 a 2 l 1 l lp a3 c
? 2003. renesas technolo gy corp., all ri g hts reserved. printed in japan . colo p hon 1.0 keep safet y first in y our circuit desi g ns ! 1. renesas technolo gy corp. puts the maximum effort into makin g semiconductor products better and more reliable, but there is alwa y s the possibilit y that trouble m a y occur with them. trouble with semiconductors ma y lead to personal in j ur y , fire or propert y dama g e . remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placem ent of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas t echnology corp. or a third party. 2. renesas technology corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents i nformation on products at the time of publication of these materials, and are subject to change by renesas technology corp. without notice due to product improvement s or other reasons. it is therefore recommended that customers contact renesas technology corp. or an authorized renesas technology corp. product distrib utor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. please also pay attention to information published by renesas technology corp. by various means, including the renesas tech nology corp. semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, a nd algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corp. semiconductors are not designed or manufactured for use in a device or system that is used under ci rcumstances in which human life is potentially at stake. please contact renesas technology corp. or an authorized renesas technology corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerosp ace, nuclear, or undersea repeater use. 6. the prior written approval of renesas technolo gy corp. is necessar y to reprint or reproduce in whole or in part these materials . 7 . if these products or technolo g ies are sub j ect to the japanese export control restrictions, the y must be exported under a license from the japanese g overnment and cannot b e imported into a countr y other than the approved destination. an y diversion or reexport contrar y to the export control laws and re g ulatio n s of japan and/or the countr y of destination is prohibited . 8. please contact renesas technolo gy corp. for further details on these materials or the products contained therein . s ales strate g ic plannin g div. nippon bld g ., 2-6-2, ohte-machi, chi y oda-ku, tok y o 100-0004, japa n htt p ://www.renesas.co m renesas technology america, inc. 450 holger way, san jose, ca 95134-1368, u.s.a tel: <1> (408) 382-7500 fax: <1> (408) 382-7501 renesas technology europe limited. dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, united kingdom tel: <44> (1628) 585 100, fax: <44> (1628) 585 900 renesas technology europe gmbh dornacher str. 3, d-85622 feldkirchen, germany tel: <49> (89) 380 70 0, fax: <49> (89) 929 30 11 renesas technology hong kong ltd. 7/f., north tower, world finance centre, harbour city, canton road, hong kong tel: <852> 2265-6688, fax: <852> 2375-6836 renesas technology taiwan co., ltd. fl 10, #99, fu-hsing n. rd., taipei, taiwan tel: <886> (2) 2715-2888, fax: <886> (2) 2713-2999 renesas technology (shanghai) co., ltd. 26/f., ruijin building, no.205 maoming road (s), shanghai 200020, china tel: <86> (21) 6472-1001, fax: <86> (21) 6415-2952 renesas technology singapore pte. ltd. 1, harbour front avenue, #06-10, keppel bay tower, singapore 098632 tel: <65> 6213-0200, fax: <65> 6278-8001 renesas sales offices

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